| CPC H05K 1/113 (2013.01) [H01L 23/49816 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 24/10 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 2224/05564 (2013.01); H01L 2224/05569 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48228 (2013.01); H01L 2224/73265 (2013.01); H05K 2201/032 (2013.01)] | 20 Claims |

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1. A printed circuit board comprising:
a substrate structure having a first surface comprising a chip mounting region on which a semiconductor chip is mounted and a second surface opposite to the first surface, the second surface having a rectangular shape having a first edge, a second edge, a third edge, and a fourth edge and a first corner, a second corner, a third corner, and a fourth corner formed by the first to fourth edges; and
pad patterns disposed on the second surface of the substrate structure,
wherein the second surface comprises:
a first region comprising a region corresponding to the chip mounting region and in contact with the first to fourth edges of the second surface, respectively; and
second regions adjacent to the first to fourth corners of the second surface, respectively and spaced apart from each other by the first region,
wherein the pad patterns comprise:
first pad patterns disposed in the first region and surface-treated with a nickel/gold (Ni/Au) layer; and
second pad patterns disposed in the second regions and surface-treated with an organic solderability preservative (OSP), and
wherein a level of at least one lower surface of the first pad patterns that are surface-treated is lower than a level of at least one lower surface of the second pad patterns that are surface-treated.
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