| CPC H05K 1/112 (2013.01) [H01L 23/49822 (2013.01)] | 16 Claims |

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1. A semiconductor device, comprising:
a first top selection structure positioned at a same vertical level as a main signal pad, along a first direction, and separated from the main signal pad; a second top selection structure positioned at the same vertical level as the main signal pad, along a second direction different from the first direction, and separated from the main signal pad;
a first ground layer positioned at the same vertical level as the main signal pad and separated from the main signal pad, the first top selection structure, and the second top selection structure; a first bottom selection structure positioned at a vertical level lower than the main signal pad and partially overlapped with the first top selection structure, the second top selection structure, and the first ground layer in a top-view perspective;
a first top via positioned between the first ground layer and the first bottom selection structure; a plurality of second top vias positioned between the first top selection structure and the first bottom selection structure, and between the second top selection structure and the first bottom selection structure; a plurality of first insulating layers positioned between the plurality of second top vias and the first bottom selection structure; and
a wiring pad positioned on the main signal pad, the first top selection structure, and the second top selection structure.
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