| CPC H04W 74/006 (2013.01) [H04L 5/0098 (2013.01); H04L 5/14 (2013.01); H04W 72/0446 (2013.01); H04W 74/0833 (2013.01); H04W 56/001 (2013.01)] | 30 Claims |

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1. An apparatus for wireless communications at a user equipment (UE), comprising:
one or more processors;
one or more memories coupled with the one or more processors; and
instructions stored in the one or more memories and executable by the one or more processors to cause the apparatus to:
receive, from a network entity, control signaling indicating a configuration for a subband full duplex slot type and a first random access channel configuration associated with the subband full duplex slot type, the configuration for the subband full duplex slot type indicating an uplink subband comprising a first set of frequency resources and a downlink subband comprising a second set of frequency resources, the first random access channel configuration indicating a first mapping of a first set of synchronization signal blocks to a first set of random access channel occasions associated with the uplink subband of the subband full duplex slot type;
receive, with the control signaling, an indication of a second random access channel configuration associated with an uplink slot type, the second random access channel configuration indicating a second mapping of a second set of synchronization signal blocks comprising the first set of synchronization signal blocks to a second set of random access channel occasions; and
transmit, to the network entity via a first uplink subband of a first slot of the subband full duplex slot type in accordance with the first random access channel configuration, at least one instance of a random access channel message via a first random access channel occasion of the first set of random access channel occasions.
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