US 12,452,564 B2
Electronic timer socket and timing setting method thereof
Yuan Ren, Zhengzhou (CN)
Assigned to ZHENGZHOU DEWENWILS NETWORK TECHNOLOGY CO., TLD., Zhengzhou (CN)
Filed by ZHENGZHOU DEWENWILS NETWORK TECHNOLOGY CO., LTD., Zhengzhou (CN)
Filed on Mar. 22, 2023, as Appl. No. 18/187,877.
Claims priority of application No. 202310088634.6 (CN), filed on Jan. 19, 2023.
Prior Publication US 2024/0251188 A1, Jul. 25, 2024
Int. Cl. H04Q 9/02 (2006.01); G01R 31/3835 (2019.01); G06F 3/147 (2006.01)
CPC H04Q 9/02 (2013.01) [G01R 31/3835 (2019.01); G06F 3/147 (2013.01); H04Q 2209/823 (2013.01)] 8 Claims
OG exemplary drawing
 
1. An electronic timer socket, comprising a battery, a key, a Micro-Controller Unit (MCU), a relay, a relay control circuit and an Alternating Current/Direct Current (AC/DC) conversion circuit,
wherein the battery is connected to a MCU through a battery voltage monitoring circuit, the key, a Liquid Crystal Display (LCD) screen and the relay control circuit are connected to the MCU;
the battery is configured to supply power to the MCU;
the AC/DC conversion circuit is configured to convert alternating current into direct current, input the direct current to the MCU and charge the battery at a same time;
the MCU is configured to detect a state of the key, acquire current time, perform logical judgment based on the state of the key, the current time and a preset timing mode, determine a light-on state of the relay based on a logical judgment result, and send a state instruction to the relay control circuit; and
the relay control circuit is configured to control and change an on/off state of the corresponding relay based on the state instruction, so as to control an on/off state of the socket;
wherein the electronic timer socket further comprises the LCD screen, a memory chip and an interface circuit,
wherein the interface circuit is connected with the MCU, the key is connected with the MCU through the interface circuit;
the LCD screen is connected with the MCU, and is configured to display a timer time and operation state; and
the memory chip is configured to store the preset timing mode and a mode parameter;
wherein the timing mode comprises one or more of the following modes: a user-defined timing mode, a Daily timing mode, a 7-Day cycle timing mode, a countdown (CTD) timing mode and a normally-on/normally-off timing mode,
wherein the user-defined timing mode is configured to set the on/off state of the relay by itself;
the Daily timing mode is configured to set the daily on/off state of the relay;
the 7-Day cycle timing mode is configured to set the on/off state of the relay from Monday to Sunday; and
the CTD timing mode is configured to perform sampling according to a set sampling frequency and then enter the on/off state of the relay within a set time interval.