US 12,452,173 B2
Reduced mesh lane routing
Benjamin Tsien, Santa Clara, CA (US); and Pravesh Gupta, Bangalore (IN)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Dec. 19, 2023, as Appl. No. 18/545,846.
Prior Publication US 2025/0202823 A1, Jun. 19, 2025
Int. Cl. H04L 47/122 (2022.01); H04L 47/125 (2022.01); H04L 47/56 (2022.01)
CPC H04L 47/122 (2013.01) [H04L 47/125 (2013.01); H04L 47/564 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a plurality of mesh lanes for sending data packets across the device between a first crossbar and a second crossbar; and
a control circuit configured to:
reroute data packets to avoid at least one mesh lane of the plurality of mesh lanes, based on a low bandwidth workload; and
disable the at least one mesh lane of the plurality of mesh lanes with a remainder of the plurality of mesh lanes remaining enabled.