US 12,452,034 B2
Exposing cryptographic measurements of peripheral component interconnect express (PCIE) device controller firmware
Mahesh Natu, Folsom, CA (US); and Adrian Pearson, Hillsboro, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Oct. 26, 2022, as Appl. No. 17/973,990.
Application 17/973,990 is a continuation of application No. 15/836,225, filed on Dec. 8, 2017, granted, now 11,522,679.
Claims priority of provisional application 62/568,687, filed on Oct. 5, 2017.
Prior Publication US 2023/0123174 A1, Apr. 20, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H04L 9/06 (2006.01); G06F 8/70 (2018.01); G06F 13/40 (2006.01); G06F 21/57 (2013.01); G06F 21/62 (2013.01); H04L 9/32 (2006.01)
CPC H04L 9/0643 (2013.01) [G06F 8/70 (2013.01); G06F 13/4045 (2013.01); G06F 21/57 (2013.01); G06F 21/572 (2013.01); G06F 21/6209 (2013.01); H04L 9/3239 (2013.01); G06F 2213/0024 (2013.01); H04L 2209/127 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A method of providing a firmware measurement of a function of an endpoint device across a Peripheral Component Interconnect Express (PCIe) interconnect, the method comprising:
calculating a measurement of a firmware object of the function, wherein the function is an endpoint for a PCIe communication and the measurement is a cryptographic identifier of the firmware object;
storing the calculated measurement in a first register;
calculating a second measurement of another firmware object of the endpoint device;
storing the second measurement in a second register; and
exposing the measurements of the firmware objects of the endpoint device as a PCIe capability structure.