US 12,451,905 B2
Over-puncture mitigation in LDCP rate matching
Xiaogang Chen, Portland, OR (US); Thomas J. Kenney, Portland, OR (US); Qinghua Li, San Ramon, CA (US); Robert Stacey, Portland, OR (US); and Shlomi Vituri, Tel Aviv (IL)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Mar. 29, 2022, as Appl. No. 17/707,911.
Prior Publication US 2022/0224362 A1, Jul. 14, 2022
Int. Cl. H03M 13/00 (2006.01); H03M 13/33 (2006.01); H03M 13/47 (2006.01)
CPC H03M 13/6393 (2013.01) [H03M 13/333 (2013.01); H03M 13/47 (2013.01); H03M 13/655 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device, the device comprising processing circuitry coupled to storage, the processing circuitry configured to:
generate a frame comprising a payload having a payload size associated with a number of bits;
determine a low-density parity-check (LDPC) codeword size based on the payload size;
calculate a number of codewords based on the payload size;
calculate a number of shortening bits and a number of LDPC padding bits based on the number of codewords;
calculate a number of orthogonal frequency division multiplexing (OFDM) symbols for containing the number of codewords; and
cause to send the frame with the number of OFDM symbols to a station device.