| CPC H03M 1/0604 (2013.01) [H03M 1/0607 (2013.01); H03M 1/0617 (2013.01); H03M 1/089 (2013.01); H03M 1/1009 (2013.01); H03M 1/38 (2013.01); H03M 1/46 (2013.01); H03M 1/462 (2013.01)] | 20 Claims |
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1. An analog-to-digital conversion circuit, comprising:
an analog-to-digital converter configured to
receive an input signal and a first clock signal from an external source that is external to the analog-to-digital converter,
generate a second clock signal having a different cycle from the first clock signal, and
output the second clock signal and a digital output signal;
a decision counter configured to sequentially increase a decision count value each time when the second clock signal received from the analog-to-digital converter is applied to the decision counter;
a voltage control logic configured to
receive the decision count value from the decision counter, and
output a control signal based on a result of comparing the decision count value with a reference count value; and
a regulator configured to output an operating voltage based on the control signal received from the voltage control logic,
wherein the analog-to-digital converter is configured to control a cycle of the second clock signal based on a magnitude of the operating voltage, and
wherein the voltage control logic is configured to control the regulator to output a corrected operating voltage based on using the control signal.
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