| CPC H03L 7/0891 (2013.01) [H03L 7/0898 (2013.01); H03L 7/093 (2013.01); H03L 7/1072 (2013.01); H03L 7/1075 (2013.01)] | 17 Claims |

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1. A phase-locked loop circuit, comprising:
a charge pump configured with a charge pump current; and
a loop filter connected to the charge pump and configured with a first resistance value, a first capacitance value, and a second capacitance value, wherein a zero frequency of the phase-locked loop circuit is configured to be determined by the first resistance value and the first capacitance value, and a pole frequency of the phase-locked loop circuit is configured to be determined by the first resistance value and the second capacitance value;
wherein at least two of the charge pump current, the first resistance value, the first capacitance value, and the second capacitance value are adjustable to change a loop bandwidth of the phase-locked loop circuit, to maintain a first ratio between the zero frequency and the loop bandwidth unchanged, and to maintain a second ratio between the pole frequency and the loop bandwidth unchanged comply with a following relationship:
when an adjusted charge pump current is K times as much as an unadjusted charge pump current, an adjusted first capacitance value is 1/K times as much as an unadjusted first capacitance value, an adjusted second capacitance value is 1/K times as much as an unadjusted second capacitance value, and the first resistance value remains unchanged before and after adjustment, or
when an adjusted first resistance value is 1/√K times as much as an unadjusted first resistance value, an adjusted first capacitance value is K times as much as an unadjusted first capacitance value, an adjusted second capacitance value is K times as much as an unadjusted second capacitance value, and the charge pump current remains unchanged before and after adjustment.
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