| CPC H03K 17/08 (2013.01) | 20 Claims |
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1. A semiconductor device comprising:
a first power pad;
a second power pad;
a signal pad;
a clamping circuit connected between the first power pad and the second power pad;
a driving circuit connected to the signal pad and comprising a pull-up circuit and a pull-down circuit; and
a first gate-off circuit connected to the pull-down circuit and comprising a voltage dividing circuit,
wherein the first gate-off circuit is configured to connect a gate of a pull-down element included in the pull-down circuit and a source of the pull-down circuit to each other during an electrostatic discharge (ESD) event in which a high voltage is applied to the signal pad, and control a current generated by the high voltage to flow to the clamping circuit, and
wherein the voltage dividing circuit comprises a first transistor and a second transistor connected in series between the signal pad and the second power pad, and a voltage of the first power pad is provided to a control terminal of the first transistor and a control terminal of the second transistor.
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