US 12,451,847 B2
Broadband on-chip nested-loop alternating current (AC)-coupling systems and methods
Ariel Leonardo Vera Villarroel, Lake Oswego, OR (US); Ronald F. Talaga, Jr., West Linn, OR (US); Abdelrahman Hesham Elsayed Ahmed, Vancouver (CA); and Jianwei Wang, Portland, OR (US)
Assigned to Analog Devices, Inc., Wilmington, MA (US)
Filed by Analog Devices, Inc., Wilmington, MA (US)
Filed on Nov. 16, 2022, as Appl. No. 17/987,985.
Claims priority of provisional application 63/284,624, filed on Nov. 30, 2021.
Prior Publication US 2023/0170852 A1, Jun. 1, 2023
Int. Cl. H03F 1/42 (2006.01); H03F 1/18 (2006.01); H03F 3/217 (2006.01); H03F 3/45 (2006.01)
CPC H03F 1/42 (2013.01) [H03F 1/18 (2013.01); H03F 3/2175 (2013.01); H03F 2203/45101 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A nested loop circuit comprising:
a common mode loop that, in a closed loop configuration, uses a common mode voltage and a reference voltage to generate a common mode output that facilitates DC biasing of an active circuit; and
a differential mode loop that generates a differential mode output that facilitates an offset compensation,
wherein the common mode output and the differential mode output are coupled to a high impedance converter circuit that provides a high impedance loading to an input of the active circuit.