| CPC H03B 5/1212 (2013.01) [G06F 1/08 (2013.01); H03K 17/60 (2013.01)] | 20 Claims |

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1. A frequency synthesis circuit, comprising:
a first transistor having a first terminal, a second terminal, and a control terminal;
a second transistor having a first terminal, a second terminal, and a control terminal;
a first inductor having a first terminal, and having a second terminal coupled to the first terminal of the first transistor;
a first capacitor having a first terminal coupled to the first terminal of the first inductor and having a second terminal coupled to the first terminal of the first transistor;
a second inductor having a first terminal, and having a second terminal coupled to the first terminal of the second transistor;
a second capacitor having a first terminal coupled to the first terminal of the second inductor and having a second terminal coupled to the first terminal of the second transistor;
a third inductor coupled between a first input and the control terminal of the first transistor;
a fourth inductor coupled between a second input and the control terminal of the second transistor; and
an injection-locked oscillator having a first input coupled to the first terminal of the second transistor, and a second input coupled to the first terminal of the first transistor.
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