| CPC H02H 9/046 (2013.01) | 20 Claims |
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1. A semiconductor device, comprising:
a voltage divider, electrically coupled between a first power rail of a power supply voltage and a second power rail of an output voltage of the semiconductor device;
a cascoded inverter, electrically coupled to the voltage divider; and
a discharge circuit, electrically coupled to the cascoded inverter,
wherein the cascoded inverter is configured to turn on the discharge circuit to discharge an electrostatic discharge (ESD) current in response to an ESD event occurring on the first power rail or the second power rail when the semiconductor device is in an ESD mode,
wherein the voltage divider comprises a first resistor, a first transistor stage, and a second transistor stage connected in series,
wherein the first resistor is coupled between the first power rail and a first node, and the first transistor stage is coupled between the first node and a second node, and the second transistor stage is coupled between the second node and the second power rail,
wherein the cascoded inverter comprises:
a first transistor, having a gate coupled to the first node, a source coupled to the first power rail, and a drain coupled to a third node;
a second transistor, having a gate coupled to the second node, a source coupled to the third node, and a drain coupled to a fourth node;
a second resistor, coupled between the second node and the third node; and
a third resistor, coupled between the fourth node and the second power rail.
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