US 12,451,454 B2
Manufacturing method of packaging structure for bipolar transistor with constricted bumps
Ryoichi Kato, Kawasaki (JP); Yoshinari Ikeda, Kawasaki (JP); Tatsuo Nishizawa, Kawasaki (JP); and Eiji Mochizuki, Kawasaki (JP)
Assigned to FUJI ELECTRIC CO., LTD., Kawasaki (JP)
Filed by FUJI ELECTRIC CO., LTD., Kawasaki (JP)
Filed on May 18, 2023, as Appl. No. 18/320,004.
Application 18/320,004 is a division of application No. 17/139,065, filed on Dec. 31, 2020, granted, now 11,705,419.
Claims priority of application No. 2020-017650 (JP), filed on Feb. 5, 2020.
Prior Publication US 2023/0307400 A1, Sep. 28, 2023
Int. Cl. H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 21/50 (2006.01); H01L 21/60 (2006.01); H01L 23/367 (2006.01); H01L 23/473 (2006.01); H01L 23/538 (2006.01); H01L 25/07 (2006.01); H10D 12/00 (2025.01); H10D 64/23 (2025.01)
CPC H01L 24/14 (2013.01) [H01L 21/50 (2013.01); H01L 23/5385 (2013.01); H01L 23/5386 (2013.01); H01L 24/95 (2013.01); H10D 12/411 (2025.01); H01L 2021/60022 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A semiconductor module manufacturing method, comprising:
providing a semiconductor device, a block electrode having a flat plate portion with opposite ends and a pair of projecting portions, and a laminated substrate including an insulating plate, a circuit pattern arranged on an upper surface of the insulating plate, and a heat dissipating plate arranged on a lower surface of the insulating plate;
arranging the semiconductor device on the block electrode such that a collector electrode of the semiconductor device faces a lower surface of the flat plate portion, to bond the collector electrode to the lower surface of the flat plate portion;
applying a bump made of a metal paste to be sintered to a bonding surface of the semiconductor device so that a tip end of the bump is formed into a tapered cone shape;
arranging the block electrode with the semiconductor device bonded thereto, on the laminated substrate such that the flat plate portion covers an area above the semiconductor device and the pair of projecting portions project toward the circuit pattern from the opposite ends of the flat plate portion; and
pressing the tip end of the bump against the circuit pattern to form a constricted portion in a middle portion of the bump in a thickness direction orthogonal to a surface of the insulating plate, to bond the semiconductor device to the circuit pattern, wherein
the applying a bump includes applying the bump such that the tip end of the bump projects more than the pair of projecting portions in the thickness direction.