| CPC H01L 23/535 (2013.01) [H01L 21/76805 (2013.01); H01L 21/76895 (2013.01); H01L 23/528 (2013.01); H01L 23/562 (2013.01); H10B 41/27 (2023.02); H10B 43/27 (2023.02)] | 17 Claims |

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1. A method of forming a microelectronic device, the method comprising:
forming pillars comprising a channel material in an array region of a stack structure, the stack structure comprising a vertically alternating sequence of insulative structures and additional insulative structures;
forming an insulative material vertically overlying the pillars and vertically overlying a distributed staircase region, the distributed staircase region comprising a first staircase region laterally neighboring the array region and a second staircase region laterally neighboring the first staircase region;
forming slots vertically extending through the stack structure;
replacing, through the slots, at least a portion of each of the additional insulative structures with a conductive structure;
filling the slots with a material to form slot structures;
forming openings in the array region, each of the openings exposing a conductive material in electrical communication with a pillar of the pillars;
forming additional openings in the first staircase region, each of the additional openings individually exposing one of the conductive structures;
forming a conductive material in the openings to form conductive contacts in the array region;
forming a conductive material in the additional openings to form first conductive contact structures in the first staircase region; and
forming additional slot structures vertically extending partially through the stack structure within each of the array region and the first staircase region, some laterally neighboring pairs of the first conductive contact structures laterally separated from one another by one of the additional slot structures.
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