| CPC H01L 23/481 (2013.01) [H01L 21/7682 (2013.01); H01L 21/76831 (2013.01); H01L 21/76877 (2013.01); H01L 21/76898 (2013.01); H01L 23/528 (2013.01)] | 20 Claims |

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15. A method comprising:
forming a through semiconductor via (TSV) in a frontside of a semiconductor substrate and a dielectric liner surrounding the TSV and between the TSV and the semiconductor substrate;
forming a plurality of elongated air gaps in the semiconductor substrate adjacent to the dielectric liner, each air gap having a first sidewall contacting the dielectric liner and a second sidewall distanced from the dielectric liner and immediately contacting the semiconductor substrate; and
planarizing a backside of the semiconductor substrate to complete the TSV.
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