US 12,451,362 B2
Method for fabricating semiconductor structure, and semiconductor structure
Xiaoguang Wang, Hefei (CN); Huihui Li, Hefei (CN); Qiang Zhang, Hefei (CN); Shan Wang, Hefei (CN); and Minmin Wu, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN); and BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY, Beijing (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN); and Beijing Superstring Academy of Memory Technology, Beijing (CN)
Filed on May 27, 2022, as Appl. No. 17/826,177.
Application 17/826,177 is a continuation of application No. PCT/CN2022/077793, filed on Feb. 25, 2022.
Claims priority of application No. 202111449848.9 (CN), filed on Nov. 30, 2021.
Prior Publication US 2023/0170224 A1, Jun. 1, 2023
Int. Cl. H01L 21/308 (2006.01); H01L 21/033 (2006.01); H10B 12/00 (2023.01)
CPC H01L 21/3086 (2013.01) [H01L 21/0337 (2013.01); H10B 12/09 (2023.02); H01L 21/3081 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A method for fabricating a semiconductor structure, comprising:
providing a substrate comprising an array region and a peripheral region;
forming a first mask layer covering the array region and the peripheral region on the substrate;
forming a first mask pattern on the first mask layer;
forming a first dielectric layer on the first mask layer and the first mask pattern;
forming a second mask layer on the first dielectric layer of the array region;
forming a second mask pattern on the peripheral region; and forming a first device structure pattern on the first mask layer by using the second mask pattern as a mask;
forming a third mask layer on the first device structure pattern;
forming a third mask pattern on the array region, wherein the first device structure pattern is covered by the third mask layer; and forming a second device structure pattern on the first mask layer by using the third mask pattern as a mask; and
etching the substrate by using the first device structure pattern and the second device structure pattern as mask layer to form a peripheral region structure and an array region structure, respectively.
 
15. A semiconductor structure formed by means of a method for fabricating the semiconductor structure, the method comprises:
providing a substrate comprising an array region and a peripheral region;
forming a first mask layer covering the array region and the peripheral region on the substrate;
forming a first mask pattern on the first mask layer;
forming a first dielectric layer on the first mask layer and the first mask pattern;
forming a second mask layer on the first dielectric layer of the array region;
forming a second mask pattern on the peripheral region; and forming a first device structure pattern on the first mask layer by using the second mask pattern as a mask;
forming a third mask layer on the first device structure pattern;
forming a third mask pattern on the array region, wherein the first device structure pattern is covered by the third mask layer; and forming a second device structure pattern on the first mask layer by using the third mask pattern as a mask; and
etching the substrate by using the first device structure pattern and the second device structure pattern as mask layer to form a peripheral region structure and an array region structure, respectively.