| CPC H01L 21/2652 (2013.01) [H01L 21/0274 (2013.01); H01L 21/266 (2013.01); H10D 30/0281 (2025.01); H10D 30/65 (2025.01)] | 10 Claims |

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1. A method of manufacturing a semiconductor device, comprising:
providing a substrate of a first conductivity type;
forming doped regions of a second conductivity type in the substrate, the doped regions including adjacent first and second drift regions, wherein the second conductivity type is opposite to the first conductivity type;
forming a polysilicon film on the substrate, the polysilicon film covering the doped regions;
forming patterned photoresist on the polysilicon film, wherein the patterned photoresist covers the first and second drift regions, and a portion of the polysilicon film above a reserved region for a body region between the first and second drift regions is exposed in the patterned photoresist; and
forming the body region of the first conductivity type in the reserved region by performing a high-energy ion implantation process, the body region having a top surface that is flush with top surfaces of the doped regions, the body region having a bottom surface that is not higher than bottom surfaces of the doped regions.
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