| CPC H01L 21/02639 (2013.01) [H01L 21/02381 (2013.01); H01L 21/02532 (2013.01); H01L 21/304 (2013.01); H01L 21/3065 (2013.01); H01L 21/324 (2013.01)] | 5 Claims |

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1. A method of fabricating a patterned mask on a silicon wafer, comprising:
grind-polishing a pre-cut silicon wafer;
ion beam configuring the grind-polished silicon wafer using an infinite 2D array selected from of cones and pyramid structures with a one-unit cell with Floquet periodic boundary conditions on four sides whereby the one-unit cell's geometry consists of one of a selected pyramid and cone structure with matched layers (PML) above the structure, with remaining space between the structure and the PMLs filled with air configured as an absorber made of conductive material whereby at an interface of the conductive material and air, with the incident field partially reflected and partially transmitted into the structure;
transferring a coronagraphic pattern to a surface of the ion beam figured silicon wafer by photolithography; and
in a cryogenic deep reactive ion etching process, applying black silicon to exposed silicon regions of the ion beam figured silicon wafer.
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