| CPC H01L 21/02581 (2013.01) [H01L 21/02458 (2013.01); H01L 21/3065 (2013.01); H01L 21/02505 (2013.01); H10D 62/8503 (2025.01)] | 19 Claims |

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1. A method of manufacturing a semiconductor structure, comprising:
S1: forming a first epitaxial structure above a substrate, wherein the first epitaxial structure is doped with a doping element;
S2: forming a sacrificial layer above the first epitaxial structure;
S3: etching the sacrificial layer;
S4: growing an insertion layer above the first epitaxial structure when the etching of the sacrificial layer is completed;
S5: growing the second epitaxial structure above the insertion layer;
wherein, before proceeding to step S4, step S2 and step S3 are repeated N times until a concentration of the doping element in the first epitaxial structure is lower than a predetermined threshold; and
wherein a protection layer is provided between the first epitaxial structure and the sacrificial layer.
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