| CPC G11C 29/52 (2013.01) [G11C 5/02 (2013.01)] | 20 Claims |

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1. An apparatus, comprising:
an array of memory cells, including:
a first data plane;
a local access line coupled to the first data plane;
a second data plane coupled to the local access line; and
a sub-access line driver (SAD) coupled to the local access line, wherein:
a first portion of the local access line between the SAD and the first data plane includes a first number of access line contacts;
a second portion of the local access line between the SAD and the second data plane includes a second number of access line contacts; and
the first number of access line contacts are determined by data corresponding to a first function of the first data plane and the second number of access line contacts are determined by data corresponding to a second function of the second data plane.
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