US 12,451,204 B2
Memory device supporting word line holding operation and operating method of the same
Hyung Jin Choi, Gyeonggi-do (KR); Se Chun Park, Gyeonggi-do (KR); and In Gon Yang, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Dec. 11, 2023, as Appl. No. 18/534,731.
Claims priority of application No. 10-2023-0097993 (KR), filed on Jul. 27, 2023.
Prior Publication US 2025/0037776 A1, Jan. 30, 2025
Int. Cl. G11C 8/08 (2006.01); G11C 8/14 (2006.01); G11C 16/08 (2006.01); G11C 16/10 (2006.01); G11C 16/34 (2006.01)
CPC G11C 16/3459 (2013.01) [G11C 16/08 (2013.01); G11C 16/102 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A memory device comprising:
a memory cell array comprising a plurality of cell strings that are connected between a plurality of bit lines and a common source line and a plurality of word lines that are connected to the plurality of cell strings; and
a controller configured to
perform program loops each comprising a voltage application operation, a word line holding operation, and a verification operation until a program operation for selected memory cells corresponding to a selected word line and a selected cell string is successful,
during the word line holding operation, apply a holding pass voltage having a higher level than a ground voltage to each of first word lines having a program state and second word lines having an erase state, which belong to unselected word lines among the plurality of word lines,
during the verification operation, apply a verification pass voltage having a higher level than the holding pass voltage to K word lines that belong to the first word lines and the second word lines, and apply the holding pass voltage to remaining word lines except the K word lines, among the second word lines,
wherein K is an integer equal to or greater than 0.