US 12,451,196 B2
Operating method of memory device and memory system
Che-Ping Chen, Taipei (TW); and Ya-Jui Lee, Taichung (TW)
Assigned to MACRONIX International Co., Ltd., Hsinchu (TW)
Filed by MACRONIX International Co., Ltd., Hsinchu (TW)
Filed on Sep. 27, 2023, as Appl. No. 18/475,247.
Prior Publication US 2025/0104778 A1, Mar. 27, 2025
Int. Cl. G11C 7/00 (2006.01); G11C 16/04 (2006.01); G11C 16/08 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01)
CPC G11C 16/26 (2013.01) [G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An operation method of a memory device, the memory device including a memory block comprising a first memory string and a second memory string, each of the first memory string and the second memory string having multiple memory cells connected in series, wherein each memory cell in the first memory string and the second memory string connected to a same word line belongs to a programmed memory page or an unprogrammed memory page, the operation method including:
performing a read operation on the memory block of the memory device, the memory block including a plurality of programmed memory pages and the at least one unprogrammed memory page, the read operation including:
applying a read voltage to a selected memory page of the plurality of programmed memory pages;
applying a first pass voltage to unselected memory pages of the plurality of programmed memory pages; and
applying a second pass voltage to the at least one unprogrammed memory page,
wherein the first pass voltage is greater than the second pass voltage,
wherein a difference between the first pass voltage and the second pass voltage is greater than 300 mV.