US 12,451,191 B2
Memory device for performing program operation including program loops and method of operating the same
Hyung Jin Choi, Gyeonggi-do (KR); Gwi Han Ko, Gyeonggi-do (KR); and Chan Sik Park, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Jul. 4, 2023, as Appl. No. 18/346,782.
Claims priority of application No. 10-2023-0002883 (KR), filed on Jan. 9, 2023.
Prior Publication US 2024/0233830 A1, Jul. 11, 2024
Int. Cl. G11C 16/12 (2006.01)
CPC G11C 16/12 (2013.01) 20 Claims
OG exemplary drawing
 
1. A method of operating a memory device, comprising:
performing a first program loop of increasing threshold voltages of first memory cells selected by a first drain select line among a plurality of memory cells coupled to a word line;
performing a second program loop of increasing threshold voltages of second memory cells selected by a second drain select line among the plurality of memory cells; and
alternately repeating the first program loop and the second program loop such that respective threshold voltages of the first memory cells and the second memory cells are increased to respective threshold voltages corresponding to respective target program states.