US 12,451,190 B2
Storage devices with multiple NAND dies
In-Su Kim, Yongin-si (KR); Hyun Jin Choi, Suwon-si (KR); Alain Tran, Hwaseong-si (KR); Beom Kyu Shin, Seongnam-si (KR); and Woo Seong Cheong, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Sep. 7, 2022, as Appl. No. 17/939,012.
Application 17/939,012 is a continuation of application No. 17/191,412, filed on Mar. 3, 2021, granted, now 11,468,952.
Claims priority of application No. 10-2020-0116067 (KR), filed on Sep. 10, 2020.
Prior Publication US 2023/0005547 A1, Jan. 5, 2023
Int. Cl. G11C 16/10 (2006.01); G11C 16/16 (2006.01); G11C 16/26 (2006.01); G11C 16/32 (2006.01)
CPC G11C 16/107 (2013.01) [G11C 16/16 (2013.01); G11C 16/26 (2013.01); G11C 16/32 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A storage device comprising:
a memory including a plurality of NAND dies that includes a first die and a second die,
wherein the first die includes a first block,
wherein the second die includes a second block, and
wherein a first super block includes the first block and the second block; and
a controller configured to perform an erase operation on the first die during a first time period, and to perform the erase operation on the second die during a second time period,
wherein the controller is configured not to perform the erase operation on the second die during the first time period, and
wherein the controller is configured not to perform the erase operation on the first die during the second time period, and
wherein the controller is configured to complete the erase operation on the first super block before starting a program operation on the first super block.