| CPC G11C 5/063 (2013.01) [H10B 63/84 (2023.02); H10N 70/021 (2023.02); H10N 70/841 (2023.02)] | 17 Claims |

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1. A semiconductor device comprising:
a first contact plug;
a word line electrically connected to the first contact plug and extending in a first direction;
a second contact plug;
a bit line extending in a second direction that intersects the first direction; and
a memory cell disposed between the word line and the bit line and comprising a variable resistance layer,
wherein the bit line comprises a first protruding part that protrudes into the memory cell, a second protruding part that is connected to the second contact plug, and a connection part that connects the first protruding part and the second protruding part and that extends in the second direction.
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