US 12,451,094 B2
Display driving circuit, display driving device, and display driving method
Fangyun Liu, Shenzhen (CN)
Assigned to Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd, Shenzhen (CN)
Appl. No. 17/769,734
Filed by Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Shenzhen (CN)
PCT Filed Mar. 25, 2022, PCT No. PCT/CN2022/083069
§ 371(c)(1), (2) Date Apr. 16, 2022,
PCT Pub. No. WO2023/168762, PCT Pub. Date Sep. 14, 2023.
Claims priority of application No. 202210238445.8 (CN), filed on Mar. 11, 2022.
Prior Publication US 2024/0420659 A1, Dec. 19, 2024
Int. Cl. G09G 3/20 (2006.01); G09G 3/36 (2006.01); G09G 3/00 (2006.01)
CPC G09G 3/3677 (2013.01) [G09G 3/2096 (2013.01); G09G 3/006 (2013.01); G09G 2310/0289 (2013.01); G09G 2320/02 (2013.01); G09G 2330/021 (2013.01); G09G 2370/00 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A display driving circuit comprising:
a power management chip configured to send first configuration information, generate second configuration information according to a detection voltage, and send the second configuration information;
a level shifter, electrically connected to the power management chip, configured to output multiple clock signals according to the first configuration information or the second configuration information; and
a detection circuit, electrically connected to the power management chip, configured to generate the detection voltage according to an output voltage of the power management chip and a preset threshold and send the detection voltage to the power management chip,
wherein the first configuration information is register data, wherein the second configuration information comprises adjusted register data, and each of the register data and the adjusted register data is configured to drive the level shifter to generate a plurality of clock signals.