| CPC G09G 3/3233 (2013.01) [H10K 59/131 (2023.02); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0247 (2013.01); G09G 2320/0626 (2013.01); H10K 59/00 (2023.02)] | 19 Claims |

|
1. A display substrate, comprising:
a base substrate; and
a plurality of sub-pixels on the base substrate, at least some of the sub-pixels comprising a pixel circuit,
wherein the pixel circuit comprises:
a light emitting module configured to emit light;
a driving module configured to drive the light emitting module to emit light based on a driving voltage in a luminescence stage;
a storage module configured to maintain and provide the driving voltage to the driving module in the luminescence stage;
a first transistor having a first electrode connected to a position from which the driving module acquires the driving voltage;
a second transistor having a first electrode connected to the first electrode of the first transistor, and a second electrode being not directly connected to a signal source; and
a voltage stabilizing capacitor having a first electrode connected to the second electrode of the second transistor, and a second electrode connected to a constant voltage signal source;
a third transistor having a first electrode connected to a second electrode of the first transistor, and a gate connected to a gate of the first transistor; and
a fourth transistor having a first electrode connected to the second electrode of the second transistor, and a gate connected to a gate of the second transistor;
wherein the light emitting module comprises a light emitting device;
the driving module comprises a driving transistor configured to drive the light emitting device to emit light based on a voltage at a gate of the driving transistor; and
the storage module comprises a storage capacitor having a first electrode connected to the gate of the driving transistor and configured to maintain the driving voltage at the first electrode of the storage capacitor and provide it to the driving module in the luminescence stage;
wherein the storage capacitor has a second electrode connected to a first power supply signal terminal which is provided with a first power supply signal via a structure forming a grid.
|