US 12,451,046 B2
Driver module and display device
Xin Fang, Beijing (CN); Wenchao Wang, Beijing (CN); Sangjin Park, Beijing (CN); Jixiang Chen, Beijing (CN); Xiaolong Chen, Beijing (CN); and Lixia Zhang, Beijing (CN)
Assigned to Fuzhou BOE Optoelectronics Technology Co., Ltd., Fujian (CN); and Beijing BOE Technology Development Co., Ltd., Beijing (CN)
Appl. No. 18/577,661
Filed by Fuzhou BOE Optoelectronics Technology Co., Ltd., Fujian (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Feb. 22, 2023, PCT No. PCT/CN2023/077608
§ 371(c)(1), (2) Date Jan. 8, 2024,
PCT Pub. No. WO2024/174119, PCT Pub. Date Aug. 29, 2024.
Prior Publication US 2025/0124843 A1, Apr. 17, 2025
Int. Cl. G09G 3/3266 (2016.01); G09G 3/20 (2006.01); G09G 3/36 (2006.01)
CPC G09G 3/2092 (2013.01) [G09G 3/3266 (2013.01); G09G 3/3677 (2013.01); G09G 2310/0267 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A driver module, applied to a display device including M rows of first gate lines; the driver module comprising: a first driver unit and a first control unit; wherein the first driver unit comprises M levels of first driver circuits; an m-th level first driver circuit comprises an m-th level first drive signal output terminal; M is a positive integer; m is a positive integer less than or equal to M;
the m-th level first drive signal output terminal is electrically connected to a first terminal of an m-th row first gate line, and is configured to provide an m-th level first drive signal to the m-th row first gate line through the m-th level first drive signal output terminal;
the first control unit comprises M first control circuits;
an m-th first control circuit comprised in the first control unit is electrically connected to a second terminal of the m-th row first gate line, and configured to control the second terminal of the m-th row first gate line to receive an ineffective voltage signal when a voltage value of the m-th level first drive signal changes from an effective voltage to an ineffective voltage;
the first terminal and the second terminal are opposite terminals;
wherein the m-th first control circuit is configured to control a connection between the second terminal of the m-th row first gate line and a first voltage signal terminal, under control of an m-th first control signal provided by an m-th first control terminal;
wherein the m-th level first driver circuit is electrically connected to an m-th level first output clock signal line, and configured to, under control of a potential of an m-th level first pull-up node, control the m-th level first output clock signal line to provide an m-th level first output clock signal to the m-th level first drive signal output terminal;
the m-th first control terminal is electrically connected to an m-th first control clock signal line;
the m-th first control clock signal line is configured to provide an m-th first control clock signal;
the m-th level first output clock signal and the m-th first control clock signal are reciprocal signals.