| CPC G06V 10/7715 (2022.01) [G06V 10/26 (2022.01); G06V 10/87 (2022.01)] | 15 Claims |
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1. An electronic device comprising:
a plurality of computing processors;
memory storing a plurality of recognition models and one or more instructions; and
a processor communicatively coupled to the plurality of computing processors and the memory,
wherein the one or more instructions, when executed by the processor, cause the electronic device to:
control at least one of the plurality of computing processors to obtain object information about one or more objects by recognizing the one or more objects existing in a space of a space map by using a first recognition model from among the plurality of recognition models, the space map corresponding to a space map of a structure,
based on the object information, divide the space of the space map into a plurality of subset spaces,
based on characteristic information of the plurality of subset spaces, determine at least one recognition model to be used in each of the plurality of subset spaces from among the plurality of recognition models, respectively,
assign the determined at least one recognition model to one of the plurality of computing processors based on an operation speed of each of the plurality of computing processors and at least one of a number of classes that are recognizable, an operation amount, or a runtime memory of the determined at least one recognition model, and
control the plurality of computing processors to perform object recognition by using the determined at least one recognition model and the one of the plurality of computing processors, to which the determined at least one recognition model is assigned, in response to the electronic device moving through each of the plurality of subset spaces, respectively.
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