US 12,450,857 B2
Automatic method to find extent of repeating geometry in an integrated circuit layout
Gordon Rouse, Dublin, CA (US); and Srivathsan Krishnamohan, Mountain View, CA (US)
Assigned to KLA Corporation, Milpitas, CA (US)
Filed by KLA Corporation, Milpitas, CA (US)
Filed on Aug. 7, 2024, as Appl. No. 18/797,300.
Claims priority of provisional application 63/539,103, filed on Sep. 19, 2023.
Prior Publication US 2025/0095317 A1, Mar. 20, 2025
Int. Cl. G06V 10/22 (2022.01); G06T 7/00 (2017.01)
CPC G06V 10/22 (2022.01) [G06T 7/0004 (2013.01); G06T 2207/30148 (2013.01)] 23 Claims
OG exemplary drawing
 
1. A system configured for determining information for an area having unknown patterns and unknown pattern repeatability, comprising:
one or more computer systems configured for:
detecting first and second polygons in first and second rows, respectively, in a design for a specimen, wherein the first row has a first dimension extending in a first direction perpendicular to an edge of a known area in the design from an inner boundary to an outer boundary of the first row, and wherein the second row has a first dimension extending in the first direction from the outer boundary of the first row to an outer boundary of the second row;
determining first and second repeating pitches of the first and second polygons, respectively; and
when the first and second repeating pitches are different from each other, determining an outer boundary of the area having the unknown patterns and the unknown pattern repeatability as the outer boundary of the first row.