| CPC G06F 13/28 (2013.01) [G06F 13/24 (2013.01); G06F 13/409 (2013.01)] | 19 Claims | 

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               1. A device comprising: 
            a microcontroller comprising a communication circuit, a central processing unit (CPU), a direct-memory access (DMA) controller and a memory, the communication circuit coupled to the CPU, the DMA controller and an external peripheral, the communication circuit comprising: 
                a trigger configuration register to store trigger configuration settings; 
                  an address configuration register to store an address of the external peripheral; 
                  a count configuration register to store a numerical value; 
                  at least one trigger input; 
                wherein the communication circuit: 
                enters a peripheral communication mode based on the trigger configuration settings and a trigger event on the at least one trigger input; 
                  transfers a number of bytes between the communication circuit and the external peripheral addressed by the address stored in the address configuration register, the number of bytes transferred based on the numerical value stored in the count register; 
                  exits the peripheral communication mode based on completion of the transfer of the number of bytes and based on the trigger configuration settings, and 
                the DMA controller to transfer data between the communication circuit and the memory. 
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