US 12,450,181 B2
Memory controller, storage device, and method of operating the same
Ji Hun Choi, Gyeonggi-do (KR); Jeong Hyun Kim, Gyeonggi-do (KR); Min Su Son, Gyeonggi-do (KR); and Sung Ju Yoo, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Feb. 8, 2023, as Appl. No. 18/107,008.
Claims priority of application No. 10-2022-0082036 (KR), filed on Jul. 4, 2022.
Prior Publication US 2024/0004811 A1, Jan. 4, 2024
Int. Cl. G06F 13/16 (2006.01); G06F 12/02 (2006.01); G06F 13/18 (2006.01)
CPC G06F 13/1673 (2013.01) [G06F 12/0238 (2013.01); G06F 13/18 (2013.01); G06F 2212/7201 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A storage device comprising:
a memory device configured to store a plurality of address maps indicating a mapping relationship between a logical address and a physical address; and
a memory controller configured to, when the storage device is in a power on state from a power off state, determine a priority rank of each of the plurality of address maps based on file attribute information received from a host, and sequentially load the plurality of address maps according to the priority rank,
wherein the file attribute information includes at least one of an access frequency, and a recent access time of each of files included in a plurality of address groups corresponding to the plurality of address maps,
wherein the memory controller is configured to determine the priority rank by:
determining a priority weighted value through a weighted value calculation using the access frequency and a difference value between a current time and the recent access time with respect to each of the files included in a selected address group among the plurality of address groups, and
determining the priority rank of a selected address map corresponding to the selected address group based on the priority weighted value.