US 12,450,162 B1
Sharing memory among multiple processors
Cory Perry, San Jose, CA (US); Gaurav Dadwal, San Jose, CA (US); Prasad Marathe, Santa Clara, CA (US); Paul J. Sidenblad, Cupertino, CA (US); and Vivek Belve Kini, San Jose, CA (US)
Assigned to NVIDIA Corporation, Santa Clara, CA (US)
Filed by NVIDIA Corporation, Santa Clara, CA (US)
Filed on Mar. 7, 2022, as Appl. No. 17/688,592.
Int. Cl. G06F 12/10 (2016.01)
CPC G06F 12/10 (2013.01) [G06F 2212/657 (2013.01)] 30 Claims
OG exemplary drawing
 
1. A processor comprising:
one or more circuits to:
receive an indication that a first virtual address has been mapped to a physical memory location on a first computing system; and
in response to the indication, generate a second virtual address mapping to a corresponding physical memory location on a second computing system, wherein the first virtual address is identical to the second virtual address, and wherein each of the first and second computing systems is to access corresponding data using the identical first and second virtual addresses.