| CPC G06F 11/0793 (2013.01) [G06F 11/073 (2013.01); G11C 15/00 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/24 (2013.01); G11C 16/26 (2013.01)] | 20 Claims |

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1. A content addressable memory (CAM), comprising:
a CAM register configured to store a mapping table, wherein the mapping table comprises first addresses and second addresses, each one of the first addresses corresponding to one of the second addresses;
N comparators coupling to the CAM register, wherein each of the N comparators is configured to compare the first addresses with one of N input signals, where Nis an integer greater than 1, and the N input signals come from N microcontroller units; and
N multiplexers coupling to the N comparators respectively and to the CAM register, and configured to generate N output signals, wherein at least one of the N output signals is obtained according to the mapping table and a comparison output by one comparator of the N comparators.
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