US 12,450,063 B2
Maintaining approximate uniformity of aging of equivalent processing circuits in a pipeline stage(s) in a processor
Hithesh Hassan Lepaksha, Hyderabad (IN); Darshan Kumar Nandanwar, Bangalore (IN); and Linga Achuta Ram Kumar Nimmala, Bangalore (IN)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Dec. 8, 2023, as Appl. No. 18/533,711.
Prior Publication US 2025/0190219 A1, Jun. 12, 2025
Int. Cl. G06F 9/38 (2018.01); G06F 9/30 (2018.01)
CPC G06F 9/30145 (2013.01) [G06F 9/3822 (2013.01); G06F 9/3836 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A processor, comprising:
a first processing unit comprising:
a first pipeline comprising a plurality of first pipeline stages, a first pipeline stage of the plurality of first pipeline stages comprising a plurality of first equivalent processing circuits; and
a hardware age management circuit (AMC) configured to:
store a plurality of first performance factors indicative of aging of and corresponding to the plurality of first equivalent processing circuits in the first pipeline stage; and
in response to a first work input, route the first work input to one of the plurality of first equivalent processing circuits based on a first performance factor of the plurality of first performance factors.