US 12,449,983 B2
Memory system reducing standby power and method for reducing standby power thereof
Sang-Kyu Kang, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Dec. 28, 2023, as Appl. No. 18/398,283.
Claims priority of application No. 10-2023-0068633 (KR), filed on May 26, 2023.
Prior Publication US 2024/0393958 A1, Nov. 28, 2024
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0619 (2013.01) [G06F 3/0634 (2013.01); G06F 3/0659 (2013.01); G06F 3/0683 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory system included in a host device, the memory system comprising:
a volatile memory device configured to perform self-refresh in a self-refresh mode based on the host device changing from an on-duty state to an off-duty state, the volatile memory device being configured to count, in the self-refresh mode, a first time period based on the host device being in the off-duty state;
a non-volatile memory device; and
a processor configured to control a read operation or a write operation of the volatile memory device and the non-volatile memory device,
wherein the processor is configured to back up data stored in the volatile memory device to the non-volatile memory device based on the volatile memory device being in the self-refresh mode and after the first time period has elapsed subsequent to the host device being in the off-duty state,
wherein the volatile memory device is configured to transmit a flag based on the first time period elapsing, transmit data stored in the volatile memory device that is included in the memory system based on a read command corresponding to the flag, count a second time period subsequent to transmission of the data being completed, and stop the self-refresh after the second time period elapses.