| CPC G06F 1/266 (2013.01) | 20 Claims |
|
1. An apparatus comprising:
a computer system implemented as a system-on-chip, the computer system including:
a plurality of agent circuits configured to generate data transactions;
a communication network configured to transfer data transactions between two or more agent circuits of the plurality of agent circuits;
a plurality of network switching circuits coupled to the plurality of agent circuits and to the communication network, wherein a particular one of the plurality of network switching circuits is configured to estimate a bandwidth need for data transactions to be sent via the particular network switching circuit in an upcoming time window; and
a bandwidth regulation circuit configured to moderate power consumption of the communication network, wherein to moderate the power consumption the bandwidth regulation circuit is configured to:
based on a frequency of a network clock signal and a voltage level of a network power signal, determine a power-based bandwidth budget using a network power budget for the upcoming time window;
using estimated bandwidth needs received from the plurality of network switching circuits, determine a global bandwidth forecast; and
allocate, using the global bandwidth forecast for the upcoming time window, the power-based bandwidth budget among the plurality of network switching circuits; and
wherein the plurality of network switching circuits are further configured to send the data transactions based on the allocation.
|