US 12,449,615 B2
Calibration markers for a photonics chip
Keith Donegan, Saratoga Springs, NY (US); Takako Hirokawa, Ballston Lake, NY (US); Yusheng Bian, Ballston Lake, NY (US); Thomas Houghton, Marlboro, NY (US); Kevin Dezfulian, Arlington, VA (US); and Carrie Yurkon, Saratoga Springs, NY (US)
Assigned to GlobalFoundries U.S. Inc., Malta, NY (US)
Filed by GlobalFoundries U.S. Inc., Malta, NY (US)
Filed on Jun. 22, 2023, as Appl. No. 18/212,754.
Prior Publication US 2024/0427094 A1, Dec. 26, 2024
Int. Cl. G02B 6/42 (2006.01); G06T 7/00 (2017.01)
CPC G02B 6/4256 (2013.01) [G02B 6/4214 (2013.01); G02B 6/4296 (2013.01); G06T 7/0004 (2013.01); G06T 2207/30204 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A structure comprising:
a semiconductor substrate;
a photonic structure; and
a back-end-of-line stack over the semiconductor substrate, the back-end-of-line stack including a first plurality of fill features, a first exclusion area surrounded by the first plurality of fill features, and a first calibration marker in the first exclusion area, the first calibration marker adjacent to the photonic structure, the first calibration marker including a first feature and a second feature adjacent to the first feature, the first feature and the second feature disposed in a row, the first feature having a first predetermined dimension, the second feature has a second predetermined dimension, and the first predetermined dimension of the first feature is larger than the second predetermined dimension of the second feature.