US 12,449,479 B2
Testing system for integrated circuit device, and signal source and power supplying apparatus
Chung-Wei Huang, Taoyuan (TW); Wei-Te Shen, Taoyuan (TW); Chia-Ping Liao, New Taipei (TW); and Kai-Li Liu, Taoyuan (TW)
Assigned to NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed by NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed on Dec. 29, 2021, as Appl. No. 17/564,514.
Claims priority of application No. 110123609 (TW), filed on Jun. 28, 2021.
Prior Publication US 2022/0413043 A1, Dec. 29, 2022
Int. Cl. G01R 31/317 (2006.01); G05F 1/46 (2006.01)
CPC G01R 31/31721 (2013.01) [G05F 1/46 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A signal source for testing a plurality of semiconductor chip groups, comprising:
a power supplying apparatus configured to generate an additional voltage, a plurality of base voltages, and a programmable voltage, wherein the programmable voltage generated by the power supplying apparatus is configured as a command for performing writing and reading tests on the semiconductor chip groups; and
a switch set disposed between the power supplying apparatus and the semiconductor chip groups, wherein the switch set converts the additional voltage and the base voltages into a plurality of supply voltages as a plurality of power signals required for performing the writing and reading tests on the semiconductor chip groups respectively;
wherein the switch set comprises a first switch coupled between the power supplying apparatus and the semiconductor chip groups and located on a transmission path of the additional voltage;
wherein the switch set comprises a plurality of second switches electrically coupled between the power supplying apparatus and the semiconductor chip groups and located on the transmission path of the base voltages;
wherein the additional voltage is transmitted to the semiconductor chip groups through the second switches, wherein the second switches are configured for electrically connecting the semiconductor chip groups in series, wherein when the first switch is switched to an open state, the additional voltage is not transmitted to the first chip and the second chip to each of the semiconductor chip groups.