CPC H04L 25/03006 (2013.01) [H04L 25/062 (2013.01); H04L 2025/03471 (2013.01)] | 20 Claims |
1. A feed forward equalizer comprising:
a plurality of delay circuits connected to each other in series and configured to delay input signals, the plurality of delay circuits including a first delay circuit configured to output a reference output;
a plurality of filters respectively corresponding to outputs of the plurality of delay circuits except for the reference output, which is an output of a first delay circuit, among the plurality of delay circuits, and the input signals, wherein each of the plurality of filters is configured to receive an output of a delay circuit corresponding thereto among the plurality of filters, and the reference output; and
a calculator configured to sum the reference output and to output of the plurality of filters.
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