US 12,119,834 B2
Circuitry comprising a loop filter
John L. Melanson, Austin, TX (US); Eric J. King, Austin, TX (US); Thomas H. Hoff, Austin, TX (US); and Lingli Zhang, Austin, TX (US)
Assigned to Cirrus Logic Inc., Austin, TX (US)
Filed by Cirrus Logic International Semiconductor Ltd., Edinburgh (GB)
Filed on Aug. 30, 2022, as Appl. No. 17/898,635.
Claims priority of provisional application 63/275,131, filed on Nov. 3, 2021.
Prior Publication US 2023/0132872 A1, May 4, 2023
Int. Cl. H03M 1/06 (2006.01); H03M 1/82 (2006.01)
CPC H03M 1/0626 (2013.01) [H03M 1/0612 (2013.01); H03M 1/822 (2013.01)] 30 Claims
OG exemplary drawing
 
1. Pulse width modulation (PWM) driver circuitry comprising:
a loop filter configured to receive an analog input signal and to output a digital loop filter output signal based on the analog input signal and an analog feedback signal; and
a PWM modulator configured to receive a digital signal based on the digital loop filter output signal and to output a PWM signal,
wherein the PWM driver circuitry further comprises a feedback path coupled to an output of the PWM driver circuitry for the analog feedback signal.