US 12,119,739 B2
Integrated power device with energy harvesting gate driver
Marco Giandalia, Marina Del Rey, CA (US); Jason Zhang, Monterey Park, CA (US); Hongwei Jia, Aliso Viejo, CA (US); and Daniel M. Kinzer, El Segundo, CA (US)
Assigned to Navitas Semiconductor Limited, Dublin (IE)
Filed by Navitas Semiconductor Limited, Dublin (IE)
Filed on Jun. 29, 2022, as Appl. No. 17/853,746.
Claims priority of provisional application 63/202,973, filed on Jul. 1, 2021.
Prior Publication US 2023/0006539 A1, Jan. 5, 2023
Int. Cl. H02M 1/08 (2006.01); G05F 1/573 (2006.01); H02M 1/32 (2007.01); H02M 3/155 (2006.01); H02M 3/158 (2006.01); H03K 3/012 (2006.01); H02H 9/02 (2006.01)
CPC H02M 1/08 (2013.01) [G05F 1/573 (2013.01); H02M 1/32 (2013.01); H02M 3/155 (2013.01); H02M 3/158 (2013.01); H03K 3/012 (2013.01); H02H 9/02 (2013.01); H03K 2217/0081 (2013.01)] 13 Claims
OG exemplary drawing
 
1. An electronic circuit comprising:
a transistor including a gate terminal, a source terminal and a drain terminal; and
a gate driver circuit including:
a pull-down transistor coupled to the gate terminal;
an input terminal arranged to receive an input signal and generate a corresponding output signal at an output terminal coupled to the gate terminal;
a pull-up transistor, wherein the input terminal is coupled to a collector terminal of the pull-up transistor; and
wherein the gate driver circuit is arranged to store energy harvested from the input signal through the pull-up transistor and use the stored energy to change a conductive state of the pull-down transistor.