US 12,119,317 B2
Singulation of microelectronic components with direct bonding interfaces
Bhaskar Jyoti Krishnatreya, Hillsboro, OR (US); Nagatoshi Tsunoda, Tsukuba (JP); Shawna M. Liff, Scottsdale, AZ (US); and Sairam Agraharam, Chandler, AZ (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Sep. 25, 2020, as Appl. No. 17/032,469.
Prior Publication US 2022/0102305 A1, Mar. 31, 2022
Int. Cl. H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H01L 23/538 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01)
CPC H01L 24/08 (2013.01) [H01L 21/4853 (2013.01); H01L 21/4857 (2013.01); H01L 21/565 (2013.01); H01L 23/3128 (2013.01); H01L 23/367 (2013.01); H01L 23/5383 (2013.01); H01L 23/5386 (2013.01); H01L 24/05 (2013.01); H01L 24/80 (2013.01); H01L 25/0652 (2013.01); H01L 25/50 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/0823 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06586 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A microelectronic assembly, comprising:
a first microelectronic component having a face having a first direct bonding interface, wherein the first microelectronic component has a trench at a perimeter of the face and having a depth;
a burr in the trench having a height that is less than the depth of the trench; and
a second microelectronic component having a second direct bonding interface, wherein the first direct bonding interface is direct bonded to the second direct bonding interface.