US 12,118,327 B1
Ripple carry adder with inverted ferroelectric or paraelectric based adders
Amrita Mathuriya, Portland, OR (US); Ikenna Odinaka, Durham, NC (US); Rajeev Kumar Dokania, Beaverton, OR (US); Rafael Rios, Austin, TX (US); and Sasikanth Manipatruni, Portland, OR (US)
Assigned to Kepler Computing Inc., San Francisco, CA (US)
Filed by Kepler Computing Inc., San Francisco, CA (US)
Filed on Sep. 3, 2021, as Appl. No. 17/467,061.
Application 17/467,061 is a continuation of application No. 17/465,781, filed on Sep. 2, 2021.
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 7/503 (2006.01)
CPC G06F 7/503 (2013.01) [G06F 2207/4822 (2013.01)] 21 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a first 1-bit adder to receive a first input, a second input, and a third input, wherein the first input is a first operand, wherein the second input is a second operand, wherein the third input is a carry-in input, wherein the third input is coupled to ground, and wherein the first 1-bit adder is to generate a first inverted sum output and a first inverted carry output; and
a second 1-bit adder coupled to the first 1-bit adder, wherein the second 1-bit adder is to receive a fourth input, a fifth input, and a sixth input, wherein the fourth input is a third operand, wherein the fifth input is a fourth operand, and wherein the sixth input is an inverted carry-in input, wherein the sixth input is coupled to the first inverted carry output, wherein the second 1-bit adder is to generate a second sum output and a second carry output, wherein individual ones of the first 1-bit adder and the second 1-bit adder include at least three input capacitors with non-linear polar material, wherein first terminals of the at least three input capacitors are directly connected without magnets to at least three inputs of the individual ones of the first 1-bit adder and the second 1-bit adder, and wherein second terminals of the at least three input capacitors are directly connected without magnets to a node.