US 12,118,286 B2
Wiring layout design method, program, and recording medium
Yusuke Koumura, Kanagawa (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Appl. No. 17/438,551
Filed by SEMICONDUCTOR ENERGY LABORATORY CO., LTD., Atsugi (JP)
PCT Filed Mar. 9, 2020, PCT No. PCT/IB2020/052002
§ 371(c)(1), (2) Date Sep. 13, 2021,
PCT Pub. No. WO2020/188397, PCT Pub. Date Sep. 24, 2020.
Claims priority of application No. 2019-052490 (JP), filed on Mar. 20, 2019.
Prior Publication US 2022/0147682 A1, May 12, 2022
Int. Cl. G06F 30/392 (2020.01); G06N 3/04 (2023.01); G06N 3/08 (2023.01); G06N 20/00 (2019.01)
CPC G06F 30/392 (2020.01) [G06N 3/04 (2013.01); G06N 3/08 (2013.01); G06N 20/00 (2019.01)] 8 Claims
OG exemplary drawing
 
5. A wiring layout design method comprising:
a first step of obtaining first layout information;
a second step of randomly generating a first wiring layout comprising one of a wiring shape and a wiring path using the first layout information;
a third step of obtaining a first parasitic capacitance value that is a parasitic capacitance value of the first wiring layout and a first wiring resistance value that is a wiring resistance value of the first wiring layout;
a fourth step of generating a second wiring layout using the first layout information;
a fifth step of checking whether the second wiring layout satisfies a design rule;
a sixth step of obtaining a second parasitic capacitance value that is a parasitic capacitance value of the second wiring layout and a second wiring resistance value that is a wiring resistance value of the second wiring layout;
a seventh step of performing learning using artificial intelligence based on a result of the fifth step, the first parasitic capacitance value, the second parasitic capacitance value, the first wiring resistance value, and the second wiring resistance value; and
an eighth step of optimizing parameters of the first layout information on the basis of a result of the learning,
wherein the optimized parameters comprise at least one of a wiring length, a wiring width, a distance between a first wiring and a second wiring which is adjacent to the first wiring, and the number of portions where a third wiring overlaps with a fourth wiring.