| CPC G06F 11/1044 (2013.01) [G06F 12/023 (2013.01); G06F 2212/251 (2013.01)] | 25 Claims |
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1. A semiconductor system comprising:
a controller configured to:
output a command and multiple addresses for performing a read modify write operation when the multiple addresses for performing a read operation have a logic level combination for selecting contiguous regions, and
output first data for performing a write operation; and
a semiconductor device configured to:
store, as write data, the first data for performing the write operation based on the command,
output internal data from a core circuit as the read operation is consecutively performed based on the command and the multiple addresses,
generate parities by performing an error correction code (ECC) operation based on the internal data and the write data, and
store the write data and the parities in the core circuit.
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