US 12,117,538 B2
Solid-state imaging device and electronic apparatus
Ryoto Yoshita, Kanagawa (JP); and Takafumi Takatsuka, Kanagawa (JP)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Appl. No. 17/274,519
Filed by Sony Semiconductor Solutions Corporation, Kanagawa (JP)
PCT Filed Sep. 9, 2019, PCT No. PCT/JP2019/035332
§ 371(c)(1), (2) Date Mar. 9, 2021,
PCT Pub. No. WO2020/059553, PCT Pub. Date Mar. 26, 2020.
Claims priority of application No. 2018-175983 (JP), filed on Sep. 20, 2018.
Prior Publication US 2022/0052088 A1, Feb. 17, 2022
Int. Cl. G01S 19/30 (2010.01); G01S 19/37 (2010.01); H01L 27/146 (2006.01)
CPC G01S 19/30 (2013.01) [G01S 19/37 (2013.01); H01L 27/1461 (2013.01); H01L 27/14614 (2013.01); H01L 27/1464 (2013.01); H01L 27/14643 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A solid-state imaging device comprising:
a light receiving surface; and
two or more pixels opposed to the light receiving surface, wherein
each of the pixels includes
a photoelectric conversion section that performs photoelectric conversion on light entering via the light receiving surface,
a first charge holding section that holds a charge transferred from the photoelectric conversion section,
a second charge holding section disposed at a position where all or a portion of the second charge holding section overlaps the first charge holding section in a planar layout, and formed to have no electrical continuity to the first charge holding section,
a first transfer transistor that transfers the charge held by the first charge holding section to a floating diffusion, and
a second transfer transistor that transfers a charge held by the second charge holding section to the floating diffusion, wherein
the first charge holding section, the second charge holding section, and the floating diffusion all include impurity semiconductor regions of a common electrical conductivity type,
the first charge holding section and the second charge holding section each have an impurity concentration lower than an impurity concentration of the floating diffusion, and
the second transfer transistor is electrically coupled to the second charge holding section by an impurity semiconductor region reaching the second charge holding section and having an impurity concentration higher than the impurity concentration of the second charge holding section.