US 12,117,485 B2
Wafer inspection system
Junichi Hagihara, Nirasaki (JP); Shigekazu Komatsu, Nirasaki (JP); Kunihiro Furuya, Nirasaki (JP); Tadayoshi Hosaka, Nirasaki (JP); and Naoki Muramatsu, Nirasaki (JP)
Assigned to TOKYO ELECTRON LIMITED, Tokyo (JP)
Filed by Tokyo Electron Limited, Tokyo (JP)
Filed on Aug. 9, 2023, as Appl. No. 18/446,724.
Application 18/446,724 is a continuation of application No. 18/147,091, filed on Dec. 28, 2022, granted, now 11,762,012.
Application 18/147,091 is a continuation of application No. 17/197,252, filed on Mar. 10, 2021, granted, now 11,567,123, issued on Jan. 31, 2023.
Application 17/197,252 is a continuation of application No. 16/930,751, filed on Jul. 16, 2020, granted, now 10,976,364, issued on Apr. 13, 2021.
Application 16/930,751 is a continuation of application No. 15/582,848, filed on May 1, 2017, granted, now 10,753,972, issued on Aug. 25, 2020.
Application 15/582,848 is a continuation of application No. 14/525,431, filed on Oct. 28, 2014, granted, now 9,671,459, issued on Jun. 6, 2017.
Claims priority of application No. 2013-224460 (JP), filed on Oct. 29, 2013.
Prior Publication US 2024/0019487 A1, Jan. 18, 2024
Int. Cl. G01R 31/28 (2006.01); G01R 1/04 (2006.01); H01L 21/677 (2006.01); H01L 21/687 (2006.01)
CPC G01R 31/2893 (2013.01) [G01R 1/0491 (2013.01); H01L 21/67706 (2013.01); H01L 21/67724 (2013.01); H01L 21/67769 (2013.01); H01L 21/68742 (2013.01)] 1 Claim
OG exemplary drawing
 
1. A wafer inspection system comprising:
a wafer inspection apparatus in which inspection rooms are vertically stacked at multiple levels, and each of the inspection rooms is capable of receiving and holding a test head having a main board within each of the inspection rooms; and
a supporting device arranged at an outside of the wafer inspection apparatus,
wherein each of the inspection rooms comprises an opening,
wherein the test head is unloaded through the opening from the inspection room,
wherein the supporting device is configured to support the unloaded test head, and
wherein the main board is unloaded from the unloaded test head supported by the supporting device and a new main board is provided to the test head.