| CPC H10K 59/122 (2023.02) [H10K 59/131 (2023.02)] | 17 Claims |

|
1. An array substrate, comprising:
a planarization layer;
an anode material layer on the planarization layer and in a peripheral area of the array substrate;
a plurality of gas releasing vias extending through the anode material layer configured to release gas in the planarization layer; and
a pixel definition material layer comprising a plurality of via blocks spaced apart from each other on the anode material layer, a respective via block covering and filling a respective gas releasing via;
wherein an aperture size of a first respective gas releasing via in a first region is smaller than an aperture size of a second respective gas releasing via in a second region;
a portion of the respective via block outside the respective gas releasing via has a width greater than an aperture width of the respective gas releasing via;
the plurality of via blocks are on a first portion of the anode material layer in a first sub-area of the peripheral area;
the pixel definition material layer further comprises a pixel definition layer defining subpixel apertures for light emitting elements; and
the pixel definition layer extends into a second sub-area of the peripheral area, covering and filling gas releasing vias in a second portion of the anode material layer; and
in at least one corner region of the array substrate, at least one gas releasing via in the first sub-area has an aperture size smaller than an aperture size of at least one gas releasing via in the second sub-area.
|